This invention relates to oscillator circuits, for example, a voltage controlled oscillator circuit for a phase-lock-loop.
Phase-locked-loop (PLL) circuits are utilized in many applications to provide an output signal that is substantially the same frequency and phase of an input reference signal. The main components of a PLL circuit comprise a phase/frequency detector, a loop filter, a voltage controlled oscillator (VCO), and an optional divide by N block which is typically implemented with a counter. When in lock, the output signal of the VCO, signal VCO.sub.OUT, is substantially N times the frequency and phase as the input reference signal. The phase/frequency detector typically has two inputs and two outputs. The two inputs include the input reference signal and the divide by N VCO feedback signal, signal VCO.sub.OUT /N, while the two outputs of the phase/frequency detector provide an UP and a DOWN signal. The phase/frequency detector compares the input reference signal to signal VCO.sub.OUT /N and operates such that if the frequency of signal VCO.sub.OUT /N is lower than the frequency of the input reference signal, the UP signal functions to increase the operating frequency of the VCO. Furthermore, if the frequency of signal VCO.sub.OUT /N is at a higher frequency than the input reference signal, the DOWN signal functions to decrease the operating frequency of the VCO. Further, when the phase-locked-loop is in lock, the input reference signal and signal VCO.sub.OUT /N are substantially equal in frequency and phase.
When a PLL circuit is operating in the tracking mode, the frequency of signal VCO.sub.OUT /N matches the frequency of the input reference signal. In the tracking mode, the phase/frequency detector attempts to maintain the frequency of signal VCO.sub.OUT /N locked to the frequency of the input reference signal. However, the performance measures that characterize the tracking mode are very complicated to account for due to non-linearities in the phase/frequency detector and various noise sources. Further, tracking time is directly effected by the VCO frequency-gain factor at an operating point wherein the operating point is a function of the VCO frequency and the voltage applied across the loop filter while the frequency-gain factor is defined as the rate of change of the VCO frequency with respect to the rate of change of voltage applied to the loop filter.
Typical PLL circuits exhibit a high frequency-gain factor at low frequencies of operation while the frequency-gain factor tends to level off as the operating frequency increases. As a result, this typically leads to poor tracking time and cycle slipping at lower frequencies of operation.
Hence, a need exists for a voltage controlled oscillator circuit having adjustable tracking time with respect to the frequency of operation of the voltage controlled oscillator.